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[partial-reconfig] Why are Bus Macros placed in sockets instead of PRRs in designs using EDK?



In PR_V4_app_note.pdf, bus macros are placed in sockets interfacing with OPB buses. I can't quite understand this. It seems to be more reasonable to place bus macros at the border of  PRRs and I found in the examples given by Xilinx bus macros were placed exactly at the borders of PRRs, not sockets.