[partial-reconfig] Some ICAP problem with ML410 on edk9.1.2

["Shih-Shen Lu" <leeraphael69@xxxxxxxxx>]

Hello,

My hardware ICAP version  is 1.00.b and driver is 1.00.c. Both ISE and EDK are 9.1.2i. I use ML403 lab program xilinx provided to reconfigure FPGA. My partial bistream can be use by IMPACT and it can work.When it use ICAP to do partial reconfiguraion, it cannot work that it stopped at some iterations. I trace the driver but I cannot find out what the problem is. Please give me some hint, thanks.

The following code is the program.
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int main (void) {

    void* fd;
    Xuint32 Reg32Value;
    char key;
   //static XIntc intc;
   Print("==========enter main===========\n\n");


#ifdef DEBUG
    hwicap_init_test();
#else
    initial_icap();
#endif

    menu();

     key = XUartLite_RecvByte(XPAR_RS232_UART_1_BASEADDR);


    while ((key != 'q') && (key != 'Q')) {
        switch (key) {
            case 'm': // Multiplier
            case 'M': // Multiplier
                    xil_printf("\r\n      Performing reconfiguration for Multiplication\n\r");
                    //XIo_Out32(XPAR_OPB_DCR_SOCKET_0_DCR_BASEADDR,0x00000000);  // disable
                    XHwIcap_CF2Icap(&InstancePtr, "gcd.bit");
                    //XIo_Out32(XPAR_OPB_DCR_SOCKET_0_DCR_BASEADDR,0x00000001);  // enable
                    menu();
                    break;
            case 'a': // Adder
            case 'A': // Adder
                    xil_printf("\r\n      Performing reconfiguration for Addition\n\r");
                    //XIo_Out32(XPAR_OPB_DCR_SOCKET_0_DCR_BASEADDR,0x00000000);  // disable
                    XHwIcap_CF2Icap(&InstancePtr, "adder.bit");
                    //XIo_Out32(XPAR_OPB_DCR_SOCKET_0_DCR_BASEADDR,0x00000001);  // enable
                    menu();
                    break;
            case 'b': // Blanking
            case 'B': // Blanking
                    xil_printf("\r\n      Performing reconfiguration for Blanking\n\r");
                    //XIo_Out32(XPAR_OPB_DCR_SOCKET_0_DCR_BASEADDR,0x00000000);  // disable
                    XHwIcap_CF2Icap(&InstancePtr, "blank.bit");
                    menu();
                    break;
            case 'o': // calculation
            case 'O': // calculation
                    operation();
                    menu();
                    break;
            case 'q': // Quit
            case 'Q': // Quit
                    break;
            default: // Quit or random data we ignore
                    break;
        }
        /* Wait for another keystroke. */
        key = XUartLite_RecvByte(XPAR_RS232_UART_1_BASEADDR);
    }

    xil_printf("Thank you. \n\r");
   return 0;
}
int XHwIcap_CF2Icap(XHwIcap *hwicap, Xuint8* filename)
{
    int i, numCharsRead, ace_buf_count, icap_buf_count, rc;
    SYSACE_FILE *stream;
    XHwIcap_Bit_Header bit_header;
    Xuint8 data3,data2,data1,data0;
    Xboolean Dirty=XFALSE;
    Xuint8 systemACE_Buffer[XSA_CF_SECTOR_SIZE];
    Xuint32 word;
    XStatus Status;


    /* Opening file */
    if ((stream = sysace_fopen(filename, "r")) == NULL) {
        xil_printf("Can't open file (%s)\r\n", stream);
        return -1;
    }


    /* Read from systemAce */
    numCharsRead = sysace_fread(systemACE_Buffer, 1, XSA_CF_SECTOR_SIZE,
                                stream);

    if (numCharsRead <= 0) {
        xil_printf("Error reading from system ace (%d)\r\n", numCharsRead);
        sysace_fclose (stream);
        return -1;
    }

    /* Read the bitstream header */
    bit_header = XHwIcap_ReadHeader(systemACE_Buffer,0);

    /* close systemAce file handle */
    rc = sysace_fclose (stream);
    if (rc < 0) {
        /* Can't close */
        xil_printf("can't close file\r\n");
        return -1;
    }

    /* Now that we have info about the bitstream,
     * re-open and skip the header.
     */

    if ((stream = sysace_fopen(filename, "r")) == NULL) {
        /* Can't open file */
        xil_printf("can't open file\r\n");
        return -1;
    }

    /* Read the header (effectively skipping it) */
    numCharsRead = sysace_fread(systemACE_Buffer, 1, bit_header.HeaderLength,
                                stream);

    /* Fill the buffer with the real bitstream info */
    numCharsRead = sysace_fread(systemACE_Buffer, 1, XSA_CF_SECTOR_SIZE,
                                stream);

    /* Loop through all bitstream data and write to ICAP */
    xil_printf("bit_header.BitstreamLength=%d\r\n", bit_header.BitstreamLength);
    ace_buf_count = 0;
    icap_buf_count = 0;
    xil_printf("enter for loop\r\n");
    for (i=0; i<bit_header.BitstreamLength; i+=4) {
    //xil_printf("bit_header=%d\r\n", i);
        /* Convert 4 chars into an integer */
        data3 = systemACE_Buffer[ace_buf_count++];
        data2 = systemACE_Buffer[ace_buf_count++];
        data1 = systemACE_Buffer[ace_buf_count++];
        data0 = systemACE_Buffer[ace_buf_count++];
        word = ((data3 << 24) | (data2 << 16) | (data1 << 8) | (data0));

        /* Copy data to HWICAP bram */
        XHwIcap_StorageBufferWrite(hwicap, icap_buf_count, word);
        Dirty=XTRUE;

        /* Check to see if we need to read from CF again */
        if (ace_buf_count == XSA_CF_SECTOR_SIZE)
        {
            /* read next sector from CF */
            numCharsRead = sysace_fread(systemACE_Buffer, 1, XSA_CF_SECTOR_SIZE,
                                        stream);
            ace_buf_count = 0;
        }

        /* Check to see if HWICAP bram is full.  If so write data to ICAP. */
        if (icap_buf_count == XHI_MAX_BUFFER_INTS-1)
        {
            /* Write data to ICAP */
            Status = XHwIcap_DeviceWrite(hwicap, 0, XHI_MAX_BUFFER_INTS);
            xil_printf("XHwIcap_DeviceWrite = %d\r\n", Status);
            if (Status != XST_SUCCESS)
            {
                /* Error writing to ICAP */
                xil_printf("1 error writing to ICAP (%d)\r\n", Status);
                return -1;
            }
            icap_buf_count=0;
            Dirty=XFALSE;
        } else
        {
            icap_buf_count++;
        }

    }

    /* Write any remaining data to ICAP */
    if (Dirty==XTRUE)
    {
        /* Write data to ICAP */
        Status = XHwIcap_DeviceWrite(hwicap, 0, icap_buf_count+1);
        if (Status != XST_SUCCESS)
        {
            /* Error writing to ICAP */
            xil_printf("2 error writing remaining data to ICAP (%d) \r\n",
                       Status);
            return -1;
        }
    }

    /* close systemACE file handle */
    rc = sysace_fclose(stream);
    if (rc < 0) {
        /* Error close file handle */
        xil_printf("error close file handle \r\n");
        return -1;
    }
    return 0;
}
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