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 Seminar: Development of Ultra Thin Silicon-on-Sapphire Film for Fully Depleted 0.25µm SOS CMOS Technology Application
Seminar Information

Development of Ultra Thin Silicon-on-Sapphire Film for Fully Depleted 0.25µm SOS CMOS Technology Application

Speaker: Hiroshi Domyo, Peregrine Semiconductor, Sydney

When: 2004-11-08 11:00:00

Venue: 78-421

Host: Tong Yeow

Abstract:

Development of Ultra Thin Silicon-on-Sapphire Film for Fully
Depleted 0.25µm SOS CMOS Technology Application

Silicon-on-sapphire CMOS is a specialised silicon integrated circuit
technology used in the fabrication of RF integrated circuits. As
with all integrated circuits, this technology is continually having
to meet the challenges of size reduction of individual devices and
device density increase in the integrated circuits to be
produced. The seminar will cover the development of the 0.25µm
generation of this technology and a range of technical challenges in
the development of the ultra thin silicon-on-sapphire film required
as the starting material for integrated circuits fabrication.

Biography:

Hiroshi Domyo graduated from Tokyo University of Agriculture and
Technology 1986 with a BS degree in Electronic Engineering. From
1986~1999 he worked on analog CMOS process development in Asahi
Kasei Microsystems Co., Ltd, Kanagawa, Japan. He joined Peregrine
Semiconductor Corp., San Diego, USA in 2000. He has been working on
the development of SOS CMOS process since 1995.

Type: Ph.D confirmation

Contact:

Tong Yeow, seminar host (yty@itee.uq.edu.au)
or Guido Governatori (ITEE seminar co-ordinator)
(guido@itee.uq.edu.au)