RTOS Speedup Methods for Hard Real-time Systems Based on Embedded RSOC
Speaker: Yi Tang, ITEE
When: 2006-11-21 14:00:00
Venue: 78-622
Host: Neil Bergmann
Abstract:This project investigates Real Time Operating System (RTOS) speedup
methods for Hard Real-time systems. Timing predictability is
introduced as a system performance metric and analysed in detail. A
review of some recent research related to RTOS speedup is undertaken
and focuses on system predictability. The major research objective
is proposed which explores targeting architecture-level and OS-level
predictability.
To implement the objective and solve the research questions, a
system architecture is proposed which adds FPGA-based hardware
support for key operating system functions to a soft-core FPGA-based
processor. Experiments are proposed to evaluate the effectiveness of
such an architecture in improving timing predictability for hard
RTOS.
Biography:Yi Tang graduated in electronic engineering from Xidian University,
Xi'an, China in 2005, and is currently a PhD student in the school
of ITEE.
Type: Ph.D confirmation
Contact:Neil Bergmann, seminar host (n.bergmann@itee.uq.edu.au)
or Guido Governatori (ITEE seminar co-ordinator)
(guido@itee.uq.edu.au)